1. Field
The present disclosure herein relates to semiconductor devices and, more particularly, to three dimensional semiconductor memory devices and methods of fabricating the same.
2. Description of the Related Art
Semiconductor devices are very attractive in an electronic industry because of small size, multi-function and/or low fabrication cost thereof. High performance semiconductor devices and/or low cost semiconductor devices have been increasingly demanded with the development of the electronic industry. The semiconductor devices have been more highly integrated in order to meet the above demands. In particular, there is a high demand to increase the integration density of semiconductor memory devices to store logic data.
In two dimensional semiconductor memory devices, a planar area that a unit memory cell occupies may directly affect the integration density of the two dimensional semiconductor memory devices. That is, the integration density of the two dimensional semiconductor memory devices may be influenced by a minimum feature size which relates to a process technology for forming fine patterns. However, there may be limitations in improving the process technology for forming the fine patterns. In addition, high cost equipments or apparatus may be required to form the fine patterns. Thus, cost for fabricating the highly integrated semiconductor memory devices may be increased.
Recently, three dimensional semiconductor memory devices have been proposed to solve the above limitations. The three dimensional semiconductor memory devices include a plurality of memory cells arrayed in three dimensions. However, in fabrication of three dimensional semiconductor memory devices, various problems may occur due to structural configurations thereof. As a result, reliability and/or electrical characteristics of the three dimensional semiconductor memory devices may be degraded.